An Architecture for a Programmable Mixed-Signal Device

IEEE Conference Paper

The following abstract is from a conference paper titled, "An Architecture for a Programmable Mixed-Signal Device," presented at the IEEE Custom Integrated Circuits Converence, May 2002.

Due to copyright restrictions I can not post the entire paper on the Internet.

Abstract

An architecture for one of the first mixed-signal programmable system-on-chip (PSoC(TM)) is presented. The PSoC Microcontroller integrates a 24 MHz 8-bit microcontroller, flash memory, SRAM, programmable analog and digital blocks, and on-chip clock generation. Programmable interconnect has been designed to allow analog and digital blocks to be combined to form a wide variety of functional modules.